The array mapper

Map your model onto the arrays

Describe a network layer by layer, or start from one of three shapes. The mapper cuts every weight matrix into tiles, finds the geometry that wastes least, and sets the digital machine’s cycles beside the array’s settlings. Counted, not estimated, and it says so.

Start from

Three convolutions and two dense layers: the shape of a small vision model.

The layers of the network, editable
#LayerShapeWeightsTilesFitRemove
01Convolution
8641 @ 6421%
02Convolution
18,4325 @ 6490%
03Convolution
73,72818 @ 64100%
04Dense
2,097,15232 @ 256100%
05Dense
2,5604 @ 6416%
Add a layer
Tile geometry

60 tiles for 2.19 M weights · 99% of provisioned cells hold one

Layers
5
Parameters
2,192,736
Cells provisioned
2,211,840
Array utilisation
99%

One pass, on two kinds of machine

One input in, one output out. On a digital processor every stored weight is a multiply-add to issue, and each output of a layer waits on a chain of them as long as the layer’s input. On the array a layer is one settling, whatever its width.

Digital processor

Multiply-adds to issue
2,192,736
Longest dependency chain
9,339 multiply-adds deep
Cycles before the output exists
37,356
At 2.5 GHz
14.94 µs

With unlimited parallel units and no memory traffic: the best case for the digital machine, not the typical one.

The array

Multiply-adds to issue
0 the cells do them at once
Longest dependency chain
5 settlings deep
Settlings before the output exists
5
Time
5 × one settling
Ahead of the digital pass when a settling takes under 2.99 µs

How long one settling takes is a property of the device and the interface electronics around it, and is characterised in evaluation. What the arithmetic can say is the threshold: the settling time the array has to beat for this network, under the assumptions set above.

Counted, not estimated. Parameters, tiles and cells follow from the shapes above by arithmetic. The digital side of the comparison is arithmetic on assumptions you set: the clock, and the cycles a fused multiply-add takes, which vendors do not publish and microbenchmarks put at about four. Nothing here says how fast the array is or at what power, because that depends on the configuration, the process, the converters and the workload. Those numbers come out of an evaluation against our device simulator, with your model, not out of a form.

Bring the real model and we map it with you.

The mapper counts geometry. An evaluation against our device simulator, with your network and your workload, is where speed and power get their numbers.